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K606's avatar
K606
Icon for Contributor rankContributor
6 months ago
Solved

Linux mSGDMA Driver Agilex 5

I am trying to use stream-to-memory DMA to move data. This is the design, showing the important Quartus connections:  Which corresponds to this address config: # address map write_sdram ...
Sw Development
Sw Library
  • StefanG_Altera's avatar
    StefanG_Altera
    6 months ago

    Hi,

    if you have a GHRD for your current board you can easily adapt the HW design (created for a supported board via e.g. build_hw_f2h_bridge.sh). The external periphery required on the demo designs is minimal (HPS-EMIF, HPS clock and UART).

K606's avatar
K606
Icon for Contributor rankContributor
6 months ago

Hi Stefan,

Ah yes the part is there!

Sorry for the typo, I did mean that my board is not listed.

So if the part number is matching, then these examples should build fine for the board I am using?

Thanks again,
K

StefanG_Altera's avatar
StefanG_Altera
Icon for Occasional Contributor rankOccasional Contributor
6 months ago

Hi,

if you have a GHRD for your current board you can easily adapt the HW design (created for a supported board via e.g. build_hw_f2h_bridge.sh). The external periphery required on the demo designs is minimal (HPS-EMIF, HPS clock and UART).