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s-harada's avatar
s-harada
Icon for New Contributor rankNew Contributor
5 months ago
Solved

Quartus Error When No Read Path Exists on F2H Bridge

Hello, I am currently investigating a Quartus compilation error related to the FPGA-to-HPS (F2H) bridge on Agilex 5 devices. [Environment] Device: Agilex 5 Tool: Quartus Prime Pro v25.3 [Issue...
embedded peripheral
  • EstebanVV_Altera's avatar
    EstebanVV_Altera
    5 months ago

    I was able to reproduce this error internally. Indeed, the F2H bridge expected the "READ" part to be enabled. I'd say you can satisfy this by just adding a "avalon" device (like the JTAG master) to the CCT, in this way you can keep "Streaming to MM" if you wish....

     

s-harada's avatar
s-harada
Icon for New Contributor rankNew Contributor
5 months ago

 

Thank you very much for checking this and reproducing the issue internally.

As you explained, I understand that the F2H bridge expects the READ part to be enabled by specification.
Even if the actual data transfer in the design is write-only, the absence of a logically valid READ path would result in this error, which is the expected behavior.

Thank you for the clear explanation and confirmation.

 

  • tehjingy_Altera's avatar
    tehjingy_Altera
    Icon for Regular Contributor rankRegular Contributor
    4 months ago

    Dear Customer,

     

    Since a solution is provided and no further clarification is needed on this thread, it will be transitioned to community support for further help on doubts in this thread.
    Please login to the Altera Community Forum and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
    Thank you for the questions and as always pleasure having you here.

     

    Best Wishes
    Altera Tech Support