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K606's avatar
K606
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1 year ago
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Linux mSGDMA Driver Agilex 5

I am trying to use stream-to-memory DMA to move data. This is the design, showing the important Quartus connections:  Which corresponds to this address config: # address map write_sdram ...
Sw Development
Sw Library
  • StefanG_Altera's avatar
    StefanG_Altera
    1 year ago

    Hi,

    if you have a GHRD for your current board you can easily adapt the HW design (created for a supported board via e.g. build_hw_f2h_bridge.sh). The external periphery required on the demo designs is minimal (HPS-EMIF, HPS clock and UART).

Jeet14's avatar
Jeet14
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1 year ago

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.