Forum Discussion
Cyclone V build flow questions (from Quartus to U-boot)
- 11 months ago
@BoonBengT_Altera
for uboot github 2024.07 all backward compile are working properly and no issue on control LWH2F H2F SDRAM2FPGA. DMA handshake req ack single.DMA fix via:
community.intel.com/t5/Intel-SoC-FPGA-Embedded/Cyclone-V-H2F-DMA-is-dead/m-p/1714304#M3338Case settled.
ENJOY~
Hi @BrianSune_Froum,
Thanks for sharing on overcoming the issues and good to know that issues has been overcome, with no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread.
Please login to ‘ https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you for the questions and as always pleasure having you here.
Best Wishes
BB