Forum Discussion
Occasional ContributorArria10 DDR ECC Initialization
Do I need to explicitly initialize DDR to known values after enabling ECC for the Arria10 DDR ?
The A10 HPS technical reference manual has the following notes against the ECCCTRL1 and ECCCTRL2 registers:
"This bit is used to set the initialize the memory and ecc to a known value"
This would suggest that explicit initialization of each DDR location is not required. Which "bit" is this referring to. There is no description of any initialization operation in either of these registers.
6 Replies
EBERLAZARE_I_IntelRegular Contributor
Hi,
Based on my experience, those registers are to left to default values. You do not need to do such after enabling ECC for the Arria 10 DDR.
- EBERLAZARE_I_Intel
Hi,
Do you have any additional questions?
PHJHi -
I would like to know what the bit referenced in the reference manual is referring to ? It is in a comment that refers to the whole register.
From my testing I do need to explicitly initialize all of DDR to avoid seeing EEC errors when I first access a location.
Thanks,
Paul
- EBERLAZARE_I_Intel
Hi Paul,
I apologize for missing out your initial question "Which "bit" is this referring to. There is no description of any initialization operation in either of these registers."
The "bit" mentioned in ECCCTRL1, is register 0xFFCFB100
while, the "bit" mentioned in ECCCTRL2, is register 0xFFCFB104
Are you configuring the HPS external memory interface (EMIF) to be 16 bits wide with error checking and correction (ECC) enabled? If so, please refer our Intel® Arria® 10 SX Device Errata and Design Recommendations below:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/es/es-1053.pdf#page=9
Regards.
