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PHJ's avatar
PHJ
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Arria10 DDR ECC Initialization

Do I need to explicitly initialize DDR to known values after enabling ​ECC for the Arria10 DDR ? The A10 HPS technical reference manual has the following notes against the ECCCTRL1 and ECCCTRL2 regi...
PHJ's avatar
PHJ
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

​Hi -

I would like to know what the bit referenced in the reference manual is referring to ? It is in a comment that refers to the whole register.

From my testing I do need to explicitly initialize all of DDR to avoid seeing EEC errors when I first access a location.

Thanks,

Paul

EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Paul,

I apologize for missing out your initial question "Which "bit" is this referring to. There is no description of any initialization operation in either of these registers.​"

The "bit" mentioned in ECCCTRL1, is register 0xFFCFB100

while, the "bit" mentioned in ECCCTRL2, is register 0xFFCFB104

Are you configuring the HPS external memory interface (EMIF) to be 16 bits wide with error checking and correction (ECC) enabled? If so, please refer our Intel® Arria® 10 SX Device Errata and Design Recommendations below:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/es/es-1053.pdf#page=9

Regards.