Agilex 7M RSU: Incorrect SPT Magic Number During Cold Boot on the Agilex 7M HBM2e board

1. Hardware/software paths

• U-Boot sf read: U-Boot SPI-NOR → Cadence QSPI controller at 0xff8d2000 → QSPI flash access window at 0xff900000 → flash. It is an HPS controller transaction, not an SDM mailbox data read.
• Linux /dev/mtd0: Linux Cadence QSPI → SPI-NOR → MTD. mtd0 is the first device-tree partition, not necessarily the entire flash - in the standard RSU setup for use with rsu_client, this begins at the start of SPT0.
• librsu / stratix10-rsu: librsu reads SPT/CPB data through /dev/mtdX; stratix10-rsu uses the ATF/SDM mailbox for RSU status, update, and control operations.

2. Can SDM handoff affect Linux reads?

Yes, indirectly. A failed QSPI ownership handoff, incorrect QSPI clock, disabled/mismatched device-tree node, or incompatible flash timing/configuration could make Linux SPI-NOR reads fail. Once ownership and timing are correctly established, Linux accesses the flash through its own Cadence/SPI-NOR driver rather than through the SDM mailbox.

3. Is a bridge, firewall, or special initialization required?

No FPGA bridge or special firewall step is normally required. The required setup is:

• successful early-boot QSPI ownership/open
• correct QSPI reference-clock information passed to Linux
• QSPI and flash nodes enabled and correctly described in the device tree
• for RSU, valid RSU partition metadata/DT handoff so the SPT location is correct

Linux then initializes the QSPI controller itself.

4. Known Agilex 7M cold-boot concerns

There is no indication of a generic Agilex 7M silicon defect that makes QSPI/RSU fail on cold boot.

Advice on Next Steps

I recommend first confirming the QSPI reference clock is correctly configured in Linux. This is an easy thing to miss as it requires a specific command to be run in U-Boot before booting Linux. For a reference of how to do this, please use the Baseline reference design:

https://altera-fpga.github.io/rel-26.1/embedded-designs/agilex-7/m-series/hbm2e/ug-gsrd-agx7m-hbm2e

In U-boot you will find a command "linux_qspi_enable", which edits the Linux device tree and sets the clock frequency of the QSPI clock source to a value determined by the U-boot device architecture code for Altera FPGAs (environment variable qspi_clock). This command (or an equivalent) must be run in U-boot before booting into Linux. You can confirm if this has been done correctly by first stopping in U-boot and running:

printenv qspi_clock

And then booting into Linux and inspecting the device tree location, which should be one of the following:

/proc/device-tree/soc/clocks/qspi-clk/clock-frequency
/proc/device-tree/soc/clkmgr/clocks/qspi_clk/clock-frequency
/proc/device-tree/clocks/qspi-clk/clock-frequency

Confirm the value in the booted Linux device tree is the same as the value of the qspi_clock variable in U-Boot.