A topic explaining a problem with Cyclone V SoC - u-booting .rbf file failure - got rejected.

Greetings Yoshiaki,

So, first, I actually tried something first yesterday after writing my original message and I have good results. In the Quartus project settings - I disabled the compression for the bitstream and also  set the Configuration scheme to Passive Parallel x16.

Also, in the same project settings, I enabled the generation of the Raw Binary File (.rbf).

So, now when the Quartus project  is rebuild (as normal) it will also create the .rbf file I need for U-boot. Then I recompiled the project, and just used to .sof file to program directly the FPGA part of the device: 

And it was all successful. Actually, the FPGA portion of the design contains a Qsys, that features several different JTAG masters and JTAG Uart. And after the design (.sof) was programmed -  those became visible when polling the jtagconfig with the USB-Blaster still attached:

Thus, the configuration files (.sof) and (.rbf) - match and work with the SoC FPGA on the board correctly. Note: At this point the produced .sof and .rbf files are 'uncompressed' and configured for 'FPP x16'.