Forum Discussion
Xuzeng_
New Contributor
1 year agowhy tx_pll_pocked and rx_cdr_pocked is always Not locked.
There is my some code about the clk,and the signal "CLK_QSFP_0_P" is connected to the REFCLK pin. When i use the tool "system console"to test the prbs,it's always not work.
Ash_R_Altera
Regular Contributor
1 year agoHi,
This is too less information to debug.
Mainly you should check if the signal CLK_QSFP_0_P is getting the correct frequency of clock as per the configuration in the syspll IP or not.
For the Rx side, ensure that the pin is receiving data at correct rate as configured in the F-tile IP.
Regards
Xuzeng_
New Contributor
1 year agoHi,
I need to debug the QSFP interface. I have verified that:
The frequency of CLK_QSFP_0_P is correctly set to 156.25 MHz
The proper reference clock source has been selected
Current clock configuration status:Hardware connection for CLK_QSFP_0_P is physically routed to quad2_ch5 (GT Quad 2, Channel 5).