Forum Discussion
CheepinC_altera
Regular Contributor
6 years agoHi Ruturaj,
Regarding your inquiry on the reconfig_reset, it is an active high input. For the reconfig_clk, you would need to ensure it is directly sourced from a free-running clock source ie oscillator on-board and stable prior to FPGA configuration.
Please let me know if there is any concern. Thank you.
Best regards,
Chee Pin