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MBaue12's avatar
MBaue12
Icon for New Contributor rankNew Contributor
6 years ago

Why is the maximum frequency lower in performance mode than in any other mode?

Hey there! I started to learn VHDL development by using a MAX10-FPGA and a small development board. My first project is to develop a small "distance sensor". The project itself is very small with j...
skyjuice's avatar
skyjuice
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

How many seeds did you run for each setting? As there could be 'seed noise', I'd recommend compiling a few seeds for each setting and do an average comparison between them.