Why does TimeQuest show data arriving after the latch edge?

To further clarify, the launch and latch edges shown in the waveform view are when the clock source initiates those edges, not when they arrive at the register/logic being clocked. So you can see the Data Required Time, represented by the dashed line as 3.467 ns after the clock source initiated the latch edge. As such (and as mentioned above) everything is based on the data required time, not when the clock source initiated the clock pulse. As long as the data arrives early enough before that time (launch edge + 3.467 ns) to meet the setup timing requirement of the logic, the path will meet timing.