Why does Qsys stop responding when generating DDR3 external memory interface?

I am trying to generate a design that is using the DDR3 SDRAM Controller with UniPHY IP core and during the Qsys HDL generation the generate window will hang rendering Qsys unusable. I am using Quartus 17.0 and Windows 10 Enterprise. I have tried reinstalling Quartus as well as running Quartus 14.1 and both times had the same result.

The generation always gets to this point:

Info: p0: Generating A6_soc_mem_if_ddr3_emif_0_p0_altdqdqs

Info: p0:

Info: p0: *****************************

Info: p0:

Info: p0: Remember to run the A6_soc_mem_if_ddr3_emif_0_p0_pin_assignments.tcl

Info: p0: script after running Synthesis and before Fitting.

Info: p0:

Info: p0: *****************************

Info: p0:

Info: p0: "mem_if_ddr3_emif_0" instantiated altera_mem_if_ddr3_hard_phy_core "p0"

and then stops. It does not explicitly fail, it just hangs execution and the only way to stop it is through task manager. I am also confident that this is not just the generation running very slowly because I have left this running for over 12 hours with no additional progress.

There are 3 warnings that are generated that also show in Qsys prior to generation:

Warning: A6_soc.mem_if_ddr3_emif_0: 'Quick' simulation modes are NOT timing accurate. Some simulation memory models may issue warnings or errors

Warning: A6_soc.mem_if_ddr3_emif_0.pll_bridge: pll_bridge.pll_sharing cannot be both connected and exported

Warning: A6_soc.mem_if_ddr3_emif_0: mem_if_ddr3_emif_0.pll_sharing must be exported, or connected to a matching conduit.

After researching these warnings they do not seem to be causing the issue and the official workarounds seem to be to ignore them.

The generation halts when using both the soft and hard version of the UniPHY controller, and Qsys generation works just fine if I remove the UniPHY IP from the design, so this may also be an issue with the SDRAM controller IP.

UPDATE:

I decided to try and run the command line utility "qsys-generate" and after failing the same way I noticed there were actually errors being thrown that the GUI was not showing me.

Error: s0: Error during execution of "{C:/intelfpga/17.0/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt": child process exited abnormally
Error: s0: Execution of command "{C:/intelfpga/17.0/quartus/../nios2eds/Nios II Command Shell.bat} make all 2>> stderr.txt" failed
Error: s0: Authorized application C:\intelFPGA\17.0\quartus\bin64\jtagserver.exe is enabled in the firewall.
Error: s0: ]2;Altera Nios II EDS 17.0 [gcc4]C:/intelfpga/17.0/quartus/bin64/uniphy_mcc -ac_code sequencer_mc/ac_rom.s -inst_code sequencer_mc/inst_rom.s -ac_rom ../A6_soc_mem_if_ddr3_emif_0_s0_AC_ROM.hex -inst_rom ../A6_soc_mem_if_ddr3_emif_0_s0_inst_ROM.hex -header sequencer/sequencer_auto.h -vheader ../sequencer_auto_h.sv -ac_rom_init sequencer/sequencer_auto_ac_init.c -inst_rom_init sequencer/sequencer_auto_inst_init.c -DAC_ROM_USER_ADD_0=0_0000_0000_0000 -DAC_ROM_USER_ADD_1=0_0000_0000_1000 -DAC_ROM_MR0=0001000110001 -DAC_ROM_MR0_CALIB= -DAC_ROM_MR0_DLL_RESET=0001100110000 -DAC_ROM_MR1=0000000000100 -DAC_ROM_MR1_OCD_ENABLE= -DAC_ROM_MR2=0000000001000 -DAC_ROM_MR3=0000000000000 -DAC_ROM_MR0_MIRR=0001001001001 -DAC_ROM_MR0_DLL_RESET_MIRR=0001011001000 -DAC_ROM_MR1_MIRR=0000000000100 -DAC_ROM_MR2_MIRR=0000000010000 -DAC_ROM_MR3_MIRR=0000000000000 -DQUARTER_RATE=0 -DHALF_RATE=0 -DFULL_RATE=1 -DNON_DES_CAL=0 -DAP_MODE=0 -DGUARANTEED_READ_BRINGUP_TEST=0 -DMEM_ADDR_WIDTH=13 -DHARD_PHY=1
Error: s0: UniPHY Sequencer Microcode Compiler
Error: s0: Copyright (C) 2017  Intel Corporation. All rights reserved.
Error: s0: Info: Reading sequencer_mc/ac_rom.s ...
Error: s0: Info: Reading sequencer_mc/inst_rom.s ...
Error: s0: Info: Writing ../A6_soc_mem_if_ddr3_emif_0_s0_AC_ROM.hex ...
Error: s0: Info: Writing ../A6_soc_mem_if_ddr3_emif_0_s0_inst_ROM.hex ...
Error: s0: Info: Writing sequencer/sequencer_auto_ac_init.c ...
Error: s0: Info: Writing sequencer/sequencer_auto_inst_init.c ...
Error: s0: Info: Writing sequencer/sequencer_auto.h ...
Error: s0: Info: Writing sequencer/sequencer_auto.h ...
Error: s0: Info: Writing ../sequencer_auto_h.sv ...
Error: s0: Info: Microcode compilation successful
Error: s0: C:/intelfpga/17.0/quartus/../nios2eds/sdk2/bin/nios2-bsp hal sequencer_bsp .. --default_sections_mapping sequencer_mem --use_bootloader DONT_CHANGE
Error: s0: Windows Subsystem for Linux has no installed distributions.
Error: s0: 
Error: s0: 
Error: s0: Distributions can be installed by visiting the Windows Store:
Error: s0: 
Error: s0: 
Error: s0: https://aka.ms/wslstore
Error: s0: 
Error: s0: 
Error: s0: Press any key to continue...
Error: s0: 
Error: s0: 
Error: s0: 
Error: s0: child process exited abnormally
Error: s0: Cannot find sequencer/sequencer.elf
Error: s0: An error occurred     while executing "error "An error occurred""     (procedure "_error" line 8)     invoked from within "_error "Cannot find $seq_file""     ("if" then script line 2)     invoked from within "if {[file exists $seq_file] == 0} { 		_error "Cannot find $seq_file" 	}"     (procedure "alt_mem_if::util::seq_mem_size::get_max_memory_usage" line 14)     invoked from within "alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequencer" "sequencer.elf""     invoked from within "set calc_mem_size [alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequencer" "sequencer.elf"]]"     ("if" then script line 2)     invoked from within "if { !$do_only_rw_mgr_mc && !($bfm_mode || $hps_mode)} { 		set calc_mem_size [alt_mem_if::util::seq_mem_size::get_max_memory_usage [file join "sequenc..."     (procedure "generate_qsys_sequencer_sw" line 924)     invoked from within "generate_qsys_sequencer_sw $prepend_str $protocol $pre_compile_dir $fileset $inhdl_dir $rdimm $lrdimm 0 0  $nios_hex_file_name $ac_rom_init_file_name ..."     invoked from within "set seq_mem_size_list [generate_qsys_sequencer_sw $prepend_str $protocol $pre_compile_dir $fileset $inhdl_dir $rdimm $lrdimm 0 0  $nios_hex_file_name ..."     ("if" else script line 2)     invoked from within "if {[::alt_mem_if::util::qini::qini_value alt_mem_if_seq_size_request 0] > 0} { 		set seq_mem_size [::alt_mem_if::util::qini::qini_value alt_mem_if_se..."     (procedure "alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer" line 238)     invoked from within "alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer "${name}" $protocol $tmpdir $fileset {}"     invoked from within "set qsys_sequencer_files_list [alt_mem_if::gen::uniphy_gen::generate_qsys_sequencer "${name}" $protocol $tmpdir $fileset {}]"     (procedure "alt_mem_if::gen::uniphy_gen::generate_sequencer_files" line 3)     invoked from within "alt_mem_if::gen::uniphy_gen::generate_sequencer_files $name "DDR3" $tmpdir QUARTUS_SYNTH"     invoked from within "foreach generated_file [alt_mem_if::gen::uniphy_gen::generate_sequencer_files $name "DDR3" $tmpdir QUARTUS_SYNTH] { 		set file_name [file tail $genera..."     (procedure "generate_synth" line 8)     invoked from within "generate_synth A6_soc_mem_if_ddr3_emif_0_s0"
Info: s0: "mem_if_ddr3_emif_0" instantiated altera_mem_if_ddr3_qseq "s0"
Error: Generation stopped, 429 or more modules remaining
Info: A6_soc: Done "A6_soc" with 152 modules, 138 files
Error: qsys-generate failed with exit code 1: 34 Errors, 3 Warnings
Info: Finished: Create HDL design files for synthesis

At this point I noticed these errors were similar to two other threads I've found.

Hard EMIF QSYS generation problem: https://forums.intel.com/s/question/0D50P00003yyP3ISAU/hard-emif-qsys-generation-problem?language=en_US

[Qsys] LPDDR2 Controller (UniPHY): HDL generation fails:

https://forums.intel.com/s/question/0D50P00003yyLGaSAM/qsys-lpddr2-controller-uniphy-hdl-generation-fails?language=en_US

They both seem to relate to the Nios II Command Shell.bat file, and searching for this I was able to find an Altera answer regarding environment variables: https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd02192013_986.html

But this did not fix my problem.

I have managed to generate my design using Quartus 17.0 on Windows 7 and as near as I can tell my environments are the same, yet it fails on Windows 10. Unfortunately using the Windows 7 machine is not a viable workaround either.

If anyone else has experienced this or has any more ideas they would be appreciated.

Thank you.