Forum Discussion
Occasional ContributorWhere are the example files
Didn't realize that about the HDL selection. VHDL probably coming in a future version.
The whole point of an IP is that it isolates you from these details. All you need to do is use the programming model for the IP (either at the hardware level with register access or at the software level with macros created using software tools) to read and write the memory. And again, since most of the interface in newer devices is hardened, the only HDL code you will see is the implementation of the Avalon or AXI connection to the hard IP.
As far as a processor is concerned, if you are talking about the HPS in an SoC device, rocketboards.org is the place to go for examples.
If you are looking at learning the details of signaling between the FPGA and the external memory, download a spec sheet from Micron or any memory manufacturer. Very detailed explanations on how everything works.
Super ContributorSo you're creating the full example design, not just an IP instance. If that's the case, there's nothing to instantiate. You open the new example design project's .qpf file (File menu -> Open Project) in the qii directory and work from that new project. The top-level file in the example design project is a Platform Designer system named ed_synth.qsys (example design for synthesis). If you want an instance to instantiate instead of a full example design, click Generate HDL from the bottom of the IP Parameter Editor or from the Generate menu at the top. This will give you a top-level file and other needed files for synthesis in the HDL you choose from the Generate HDL dialog box.
As for the HDL for the example design, you have to switch the option (HDL Selection) in your screenshot on the Example Design tab.
