Forum Discussion
Where are the example files
- 2 years ago
Didn't realize that about the HDL selection. VHDL probably coming in a future version.
The whole point of an IP is that it isolates you from these details. All you need to do is use the programming model for the IP (either at the hardware level with register access or at the software level with macros created using software tools) to read and write the memory. And again, since most of the interface in newer devices is hardened, the only HDL code you will see is the implementation of the Avalon or AXI connection to the hard IP.
As far as a processor is concerned, if you are talking about the HPS in an SoC device, rocketboards.org is the place to go for examples.
If you are looking at learning the details of signaling between the FPGA and the external memory, download a spec sheet from Micron or any memory manufacturer. Very detailed explanations on how everything works.
I'm assuming you are generating instances of these IPs, not an "example design" which is a complete Quartus project you can use to test an IP. I'm more familiar with EMIF, so for that IP, there should be a folder with the name you used for the instance. All the files for the IP are in there, including the top-level file (.v from your message) so you can instantiate it.