Forum Discussion
mitsvoid
New Contributor
New ContributorWarning (14320): Synthesized away node - FFT IP core
Dear All, I hope you are doing well. I am currently working on creating a custom IP core to integrate with NIOSII. The custom IP encompasses configurations for both the wm8731 and FFT. I am now in...
Hi,
You can simulate the FFT IP without a license. Follow the steps mentioned 2.5. Simulating Intel® FPGA IP Cores
Thank you,
Kshitij Goel
mitsvoidNew Contributor
New ContributorI have attached a photo hopefully it helps on the design.
The Memory_Module ram stores the audio adc data and the FFT_module ram stores the output from the FFT.
Is only shown memory bit qb[21] removed or all memory?
For the entire memory. Please find the attached .txt file with specific warnings.
I tried to check the operation in simulation. However, when I enable the EDA simulation tools, I receive an error 204012. Please check the attached file (Error204012sim.txt) for details.
Could you let me know if this error is due to the license?
Can I simulate the FFT IP core without a license?
Thank you for your prompt reply.
FvM
Super Contributor
Super ContributorThe error message indicates that you are trying to simulate encrypted synthesis files which is isn't possible whether you have a license or not.
You need to generate simulation files during HDL generation and simulate these, it's also possible with free Quartus lite.
You need to generate simulation files during HDL generation and simulate these, it's also possible with free Quartus lite.
