MingBai
New Contributor
New ContributorVERILOG_MACRO
Dear,
I haved defined a Verilog macro in the .qsf file.
But the results are far from expectations.
Is it a software bug?
Forum Discussion
4 Replies
paveetirrasrie_AlteraFrequent Contributor
Hi MingBai,
I will look into it and will update you on this soon. Thanks.
Regards,
Pavee
- paveetirrasrie_Altera
Hi,
Could you kindly explain in more detailed about your query?
Regards,
Pavee
- paveetirrasrie_Altera
Hi Ming Bai,
It would be helpful if you can kindly explain further in detail about the issue.
If the issue has been resolved, kindly do let me know.
Regards,
Pavee
- paveetirrasrie_Altera
We do not receive any response from you to the previous question that I have provided. This thread will be transitioned to community support.
If you have a new question, feel free to open a new thread to get the support from Intel experts.
Otherwise, the community users will continue to help you on this thread.
Thank you.
