Verilog initfile for inferred-RAM, $readmemh won't accept parameter-argument

I've written the following code in a Systemverilog design-file:

   module font_2ram# ( 
  parameter init_file = "font88_8.txt" ) ( ... );
   reg   memory ;
    initial $readmemh( init_file, memory );  // 8x8 (half-height) font

Unfortunately, Quartus-II doesn't like it:

Error (10853): Verilog HDL error at font_2ram.sv(43): argument 0 to $readmemh must be a string literal

Instead, I have to hardcode the string in the $readmem command itself:

module font_2ram ( ... );
   reg   memory ;
    initial $readmemh( "font88_8.txt", memory );  // 8x8 (half-height) font

Xilinx XST 9.1 accepts a parameter-argument to $readmemh() just fine.

I don't suppose this could be a new feature for Quartus 8.x?