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Altera_Forum
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18 years ago

Verilog initfile for inferred-RAM, $readmemh won't accept parameter-argument

I've written the following code in a Systemverilog design-file: module font_2ram# ( parameter init_file = "font88_8.txt" ) ( ... ); reg memory ; initial $readmemh( init_file, m...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Could you file an SR? This post is for people to help each other with stuff already working, but there is no ownership. (It can be worthwhile to see if other people are requesting this, if someone has a workaround etc., but there is no guarantee Altera will fix an issue because it was posted here.) Thanks.