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eman_delete
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2 years ago

VCS error Error-[URMI] Unresolved modules in cyclonev_atoms_ncrypt.v

I'm trying to run the vcsmx_setup.sh script generated by QSYS. I'm getting the elabortion error:

Error-[URMI] Unresolved modules

/<path>/quartus_15.0/quartus//eda/sim_lib/synopsys/cyclonev_atoms_ncrypt.v, 25

I'm not able to understand which module is missing since cyclonev_atoms_ncrypt.v is protected.

I tried different ways to resolve this error, based on different documentation materials, e.g. trying the exact vcs version supported by quartus_15.0, using -lca flag and 64bit version, no -v for the altera_lnsim.v compilation, etc.

I also tried to use the unencrypted cyclonev_atoms.v file. Even for this file I can see that the following encrypted module is instantiated and is missing

cyclonev_clk_phase_select_encrypted

I'm trying to understand which way should I proceed? Should I continue with the encrypted file?

In this case, how can I find which module is missing? Should I continue with the unencrypted file?

In this case, where can I find the cyclonev_clk_phase_select_encrypted module?

Is it correct that the _atoms_ files are for the netlist simulation? I'm trying to simulate RTL, why these files are in the QSYS generated .sh script? Is it because, some of the models are netlist?

If so, I cannot just remove these files from the compilation list, can I?

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    • eman_delete's avatar
      eman_delete
      Icon for New Contributor rankNew Contributor
      2 years ago

      Hello,

      I have already replied in this thread that I cannot upgrade the used Quartus version. I has to use Quartus 15.0.

      Anyway, after multiple attempts and exeperiments, I was able to find the name of the unresolved module.

      The missing module is asmi_sim_model. If I stub this module I'm able to elborate the Qsys model.

      I can see the following information on how to use the asmi model:

      https://www.youtube.com/watch?v=kxNDMSUQt1Q

      I also read the article: ASMI_an720-683464-667011.pdf

      What should be the approach if I want the capability of running simulation of the full chip including SW (NIOS), DDR, TSE, SGDMAs, QSYS interconnect and other modules in the design? Can it be done without the Flach BFM models? Should I stub the asmi_sim_model, or is there a better solution?

      Thank you.