Altera_ForumHonored Contributor7 years agoUnivercity program VWF simulation error I try to simulate Generic parity detector example in the book Circuit Design with VHDL. (Velnei A. Pedroni). But, simulation waveform editor gives an error. My synthesis editor is Quartus 2 web editi...Show More
Altera_ForumHonored Contributor7 years agoWhen all else fails try Simulation => Simulation Settings => Restore Defaults
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