Forum Discussion
Domi_
New Contributor
5 years agoUpdate 09.12.2020
I got a tip from a colleague that BRAM blocks might share some resources with DSP blocks. As a consequence, one cannot fully use a BRAM block if a DSP block is used, or at least not in any configuration.
Looking at the synthesis results, one can see that Quartus wants to use 453/397 M10K blocks, i.e. 56 too many. 56 is exactly the number of DSP blocks used in this design. So this is a strong evidence that Cyclon V FPGAs have this limitation too.
However, I was unable to find anything related to this in the documentation. So the problem remains unsolved.