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Domi_
New Contributor
New ContributorUnable to use whoe BRAM recources on Cyclone V FPGA
Hello Community We're developing a Cyclone V 5CSEMA5F31C6 FPGA product in which we want to use almost all RAM recources. From the Cyclon V device overview, this FPGA has 397 M10K blocks, yielding a...
Domi_New Contributor
New ContributorUpdate 09.12.2020
I got a tip from a colleague that BRAM blocks might share some resources with DSP blocks. As a consequence, one cannot fully use a BRAM block if a DSP block is used, or at least not in any configuration.
Looking at the synthesis results, one can see that Quartus wants to use 453/397 M10K blocks, i.e. 56 too many. 56 is exactly the number of DSP blocks used in this design. So this is a strong evidence that Cyclon V FPGAs have this limitation too.
However, I was unable to find anything related to this in the documentation. So the problem remains unsolved.
