Forum Discussion
AqidAyman_Altera
Regular Contributor
1 year agoHello,
Apologies as I am out of office on that time.
However, I have suggestion for you. Can you help to follow this example design from below link:
I think you can copy the Verilog code into your design.
Regards,
Aqid
FPGA_user2
New Contributor
1 year agoHello Aqid sir,
Thank You for the reply. I will execute the steps in the design example.
Regards