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Tex's avatar
Tex
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
Solved

UART receiver loopback characters VHDL

Greetings, I'm new to the world of FPGA's could anyone suggest me anything that helps me to learn implementing UART serial communication receiver loopback characters without state machines in VHDL ...
Compilation
Hdl
Tex's avatar
Tex
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Thank you sheng this helped me alot..

for the link 1

when i try to assain pins there are showing more than 50

please tell me which pins should i assaign only 3 enough ???

regards,

Tex

ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi Tex,

Pins that should be assgined:

I_clk

I_reset

I_txData (If you're getting the data externally from the board, then needed. Otherwise, not needed)

O_tx, I_rx (Needed as to make loopback connection)

O_rxData (If you're showing the received data externally to the board like LED or Monitor, then needed. Otherwise, not needed)

For this I_txSig, you can comment out this input port and the rest in the code if you're not using it.

For I_rxCont and I_clk_baud_count, you can declare them as signal instead of input port so that not need to make any pin assignment. For example like below:

signal I_clk_baud_count : STD_LOGIC_VECTOR(15 downto 0) := X"01B2"; -- 115200bps @ 50Mhz Clk
signal I_rxCont : STD_LOGIC := '1';

Pins that not needed to be assigned (monitor and debug purpose):

If you want to assign, you can assign to for example like LED respectively.

O_txRdy

O_rxSig

O_rxFrameError

D_rxClk

D_rxState

D_txClk

D_txState

Thanks,

Best Regards,

Sheng