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Altera_Forum's avatar
Altera_Forum
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12 years ago

UART and MODELSIM ALTERA (code attached)

Hi dears. I am trying to use a (slightly) modified version of the UART explained in a tutorial I've found, after reading some theory about. There is one UART entity which has two c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

In resume, why the en_mod is not changing again to '0' in uart_rx when the start bit is detected ?

case state_reg is

when idle =>

if (rx = '0') then

state_next <= start;

en_mod_reset <= '0'; -- mod 27 set, counting.

s_next <= (others => '0');

end if;

Thanks.