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MYank
New Contributor
New ContributorTrouble making timing with large number of memory banks
I have a design that has 14 memory banks. Each bank is 64xM20K blocks. There is block (MUX) that reads/writes one bank, while another block (FFT) that reads/writes another bank. There is a 1 to 14 ...
KennyT_altera
Super Contributor
Super ContributorWhat Device that you were using? What do you mean the extra registers is not place in between the router and memories? Can you screenshot the rtl viewer vs the technology map viewer?
Sometimes, retiming happened and those register might have move to inside the memories or to other places. You can also check your memory block inside in the resource property editor.
