Trouble hardcoding an initial value of flip-flop on power up.

Why are you using the primitives? why not infer the register, because then you can apply the initial value yourself:

signal q : std_logic := '1';  -- initial value
....
process(clk)
begin
  if clrn = '0' then
    q <= '0';
  elsif prn = '0' then
    q <= '1'
  elsif rising_edge(clk) then
    q <= d;
  end if;
end process;

If a register has async clear, it often uses this as the power on value if none is specified.

If you have to use the primitives, I think you can assign the power on value in the project assignments. You will need to compile the project to get the register path from the node finder.