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New Contributor

2 years ago

Timing Constraints in DCFIFO through LPM

DCFIFO if generated through IP catalog will have the associated SDC constraints as well (set_max_delay/set_min_delay, set_net_delay and set_max_skew). What about DCFIFO instantiated through LPM (ht...

Timing

RichardT_altera

Super Contributor

2 years ago

Hi,

There is no associated sdc generated through LPM.

If you choose to code your own dual clock FIFO, you must also create appropriate timing constraints in Synopsis Design Constraints format (.sdc).

Reference:

https://www.intel.com/content/www/us/en/docs/programmable/683082/23-1/dual-clock-fifo-timing-constraints.html

Regards,

Richard Tan

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Timing Constraints in DCFIFO through LPM

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