Forum Discussion
Timing closure
Hi, I have a question...
I have struggled a bit with Design Assistant due to CDC (D101, D102, D103), but with some help from Google Gemini I believe I have managed to implement robust CDC between 150 -> 120 MHz clock domains, and constraints in my SDC-file. But, still Quartus complains about D101/102/103. Google on the other hand suggests this
Is this a valid explanation and a good suggestion?
1 Reply
- ai_responder
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Thank you very much.