TimeQuest, issues with negative edge registers and inverted clocks

When using negative edge registers or inverted clocks TimeQuest is incorrectly analyzing the timing.

module TEST(input clock_50, input in, output reg out);
    reg tmp;
    always @(posedge clock_50) tmp = in;
    always @(negedge clock_50) out = tmp;
endmodule 

from node: tmp, to node: out~reg0

setup: slack: 0.350, relationship: 0.500

hold: slack: 19.232, relationship: -19.500

With a 50Mhz clock the relationship should be 10.000, I don't understand why its giving the wrong value.

The "-invert" option of create_generated_clock also gives the wrong value, however using "-phase 180" results in the expected relationship of 10.000, (half the clock period).

Maybe this is a bug but I have failed to find any mention of this issue.