Tcl Error in Timing Analysis phase using LVDS SERDES RX IP

Hi,

Upon checking, this is caused by the typo in Arria10_DAQ.v (Line 298)

After replacing line 298 with .adc3_clk(ADC3_CLK), you will see Fitter error below:

Error(14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 IOPLL(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.

Error(175001): The Fitter cannot place 1 IOPLL, which is within LVDS SERDES Intel FPGA IP adc_lvds_rx_altera_lvds_1940_p47vjlq.

Info(14596): Information about the failing component(s):

Info(175028): The IOPLL name(s): global_adc_handler|adc_lvds_rx3|lvds_0|core|arch_inst|internal_pll.pll_inst|altera_lvds_core20_iopll

Error(16234): No legal location could be found out of 16 considered location(s). Reasons why each location could not be used are summarized below:

Error(175006): There is no routing connectivity between source pin and the IOPLL

Info(175026): Source: pin ADC3_CLK

Info(175015): The I/O pad ADC3_CLK is constrained to the location PIN_AL5 due to: User Location Constraints (PIN_AL5)

Info(14709): The constrained I/O pad is contained within this pin

Info(175021): The pin was placed in location pin containing PIN_AL5

Error(175022): The IOPLL could not be placed in any location to satisfy its connectivity requirements

Info(175029): 14 locations affected

Info(175029): IOPLL_2A

Info(175029): IOPLL_2F

Info(175029): IOPLL_2G

Info(175029): IOPLL_2H

Info(175029): IOPLL_2I

Info(175029): IOPLL_2J

Info(175029): IOPLL_2K

Info(175029): IOPLL_2L

Info(175029): IOPLL_3C

Info(175029): IOPLL_3D

Info(175029): IOPLL_3E

Info(175029): IOPLL_3F

Info(175029): and 2 more locations not displayed

Error(20196): Location(s) already occupied and the components cannot be merged. (2 locations affected)

Info(175029): IOPLL_3A. Already placed at this location: IOPLL global_adc_handler|adc_lvds_rx1|lvds_0|core|arch_inst|internal_pll.pll_inst|altera_lvds_core20_iopll

Info(175029): IOPLL_3B. Already placed at this location: IOPLL global_adc_handler|adc_lvds_rx2|lvds_0|core|arch_inst|internal_pll.pll_inst|altera_lvds_core20_iopll

This error indicates that there is another design component already placed at this location and the two components are not mergeable. Refer to details in Info(175029)

To fix this fitter error, reassign ADC3_CLK to other pin location. After reassigning the pin location, the compilation passed without the error

Error(23035): Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object.

Thanks.

Best regards,

KhaiY