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YTagu5
New Contributor
New Contributor"Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object." when using LVDS SERDES IP.
Hi, I'm using LVDS SERDES Intel FPGA IP in my project. I use RX Non-DPA. My project compiles almost successfully, except in Timing Analysis. In the end of the Timing Analysis, I got "Tcl error: ERR...
GBrajNew Contributor
New ContributorHi to all,
I have the exact issue (Tcl error: ERROR: Argument <node_object> is an object filter that matches no objects. Specify one matches only one object.) with a design that contains the LVDS SERDES core, in non-DPA mode, during the Timing analyzer phase, running Quartus 19.4.0 Build 64.
The same design works flawlessly in Quartus Pro 19.1.0 Build 240
I tried to clean the project and regenerate the IP cores, but without success. I'm not using Qsys, but the raw IP connected to custom logic. The PLL of LVDS is not external but internal to the SERDES IP.
