Altera_Forum
Honored Contributor
11 years agoSysem console does not connect to trace system ip of Qsys
hello, I work on a Cyclone V SoC dev kit of Terasic with the Cyclone V SX SoC—5CSXFC6D6F31C8NES FPGA. I have a simple design in Qsys using the Altera VIP (test pattern generator, monitor, trace system and clocked video output) but when I configured the FPGA and launch the system console, I have always the same warning :
FPGA does not contain SystemConsole USB soft logic (no I2C ack) And I don't see the "trace table view" option Under "Tools". I verified the design with SignalTap and I saw valid datas in output. Does anybody have an idea ?