Synthesizing LPM_DIVIDE with positive SKIP_BITS parameter

Hey guys,

I am relatively new to VHDL and would be grateful to get some help.

I was trying to instantiate the lpm_divide megafunction using the following code:

ENTITY dummy IS

PORT

(

denom : IN STD_LOGIC_VECTOR (2 DOWNTO 0);

numer : IN STD_LOGIC_VECTOR (6 DOWNTO 0);

quotient : OUT STD_LOGIC_VECTOR (6 DOWNTO 0);

remain : OUT STD_LOGIC_VECTOR (2 DOWNTO 0)

);

END dummy;

ARCHITECTURE SYN OF dummy IS

SIGNAL sub_wire0 : STD_LOGIC_VECTOR (6 DOWNTO 0);

SIGNAL sub_wire1 : STD_LOGIC_VECTOR (2 DOWNTO 0);

COMPONENT lpm_divide

GENERIC (

lpm_drepresentation : STRING;

lpm_hint : STRING;

lpm_nrepresentation : STRING;

lpm_type : STRING;

lpm_widthd : NATURAL;

lpm_widthn : NATURAL;

SKIP_BITS : NATURAL

);

PORT (

denom : IN STD_LOGIC_VECTOR (2 DOWNTO 0);

quotient : OUT STD_LOGIC_VECTOR (6 DOWNTO 0);

remain : OUT STD_LOGIC_VECTOR (2 DOWNTO 0);

numer : IN STD_LOGIC_VECTOR (6 DOWNTO 0)

);

END COMPONENT;

BEGIN

quotient <= sub_wire0(6 DOWNTO 0);

remain <= sub_wire1(2 DOWNTO 0);

lpm_divide_component : lpm_divide

GENERIC MAP (

lpm_drepresentation => "UNSIGNED",

lpm_hint => "MAXIMIZE_SPEED=6,LPM_REMAINDERPOSITIVE=TRUE",

lpm_nrepresentation => "UNSIGNED",

lpm_type => "LPM_DIVIDE",

lpm_widthd => 3,

lpm_widthn => 7,

SKIP_BITS => 2

)

PORT MAP (

denom => denom,

numer => numer,

quotient => sub_wire0,

remain => sub_wire1

);

END SYN;

I am trying to divide a 7 bit positive number by a 3 bit one, apriori knowing that the 2 MSBs of the quotient are zeros. This fact can be exploited in synthesis optimization by setting the "SKIP_BITS" parameter to the value 2.

When I attempt to synthesize this entity, I receive the following error message (in Quartus II 9.1):

"Error: MGL_INTERNAL_ERROR: The source port lpm_divide|sign_div_unsign inst divider|alt_u_div inst divider|prestg already has one or more bits in the range 1 to 0 assigned. CAUSE : The port range was already assigned a value. The new value can not be reassigned."

Could you guys help me work this out ??

Thanks ahead.