Synthesizing LPM_DIVIDE with positive SKIP_BITS parameter

Thanks a lot for the tip kaz. I've updated the code:

ENTITY dummy IS

PORT

(

denom : IN STD_LOGIC_VECTOR (2 DOWNTO 0);

numer : IN STD_LOGIC_VECTOR (6 DOWNTO 0);

quotient : OUT STD_LOGIC_VECTOR (6 DOWNTO 0);

remain : OUT STD_LOGIC_VECTOR (2 DOWNTO 0)

);

END dummy;

ARCHITECTURE SYN OF dummy IS

COMPONENT lpm_divide

GENERIC (

lpm_drepresentation : STRING;

lpm_hint : STRING;

lpm_nrepresentation : STRING;

lpm_type : STRING;

lpm_widthd : NATURAL;

lpm_widthn : NATURAL;

SKIP_BITS : NATURAL

);

PORT (

denom : IN STD_LOGIC_VECTOR (2 DOWNTO 0);

quotient : OUT STD_LOGIC_VECTOR (6 DOWNTO 0);

remain : OUT STD_LOGIC_VECTOR (2 DOWNTO 0);

numer : IN STD_LOGIC_VECTOR (6 DOWNTO 0)

);

END COMPONENT;

BEGIN

lpm_divide_component : lpm_divide

GENERIC MAP (

lpm_drepresentation => "UNSIGNED",

lpm_hint => "MAXIMIZE_SPEED=6,LPM_REMAINDERPOSITIVE=TRUE",

lpm_nrepresentation => "UNSIGNED",

lpm_type => "LPM_DIVIDE",

lpm_widthd => 3,

lpm_widthn => 7,

SKIP_BITS => 2

)

PORT MAP (

denom => denom,

numer => numer,

quotient => quotient,

remain => remain

);

END SYN;

I am afraid you missed the point of my question:

I am receiving the earlier quoted error message when the value of the SKIP_BITS generic is set to be higher then 1. I can not figure out the reason for the error.

I'd be very grateful if you could give me a tip on that too...