Forum Discussion
6 Replies
- ShengN_altera
Super Contributor
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- ShengN_altera
Super Contributor
[DELETED]
- aee
New Contributor
Hi ShengN,
Thank you so much for your help! The INI file worked perfectly and I can now see and select the target chip correctly.
However, I’ve run into a new issue with the AI DSP IP core. When I instantiate it, the maximum configuration I can get is only 5 multiply-accumulate units for 8-bit numbers, which is a big gap from the public documentation stating it should support 10 parallel 8-bit multiplications. As a result, I’m only achieving a very low fraction of the peak compute performance.
Could this mean that I also need another specific configuration file or license to unlock the full 10 multiplication AI DSP block capability? Any guidance on this would be greatly appreciated!
- RichardT_altera
Super Contributor
Could you please indicate which public documentation and which specific section state this information?
Additionally, which AI DSP IP core are you referring to?
To help with further investigation, please share your design QAR file (Project → Archive Project).
Regards,
Richard Tan