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Altera_Forum
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15 years ago

Synthesizing LPM_DIVIDE with positive SKIP_BITS parameter

Hey guys, I am relatively new to VHDL and would be grateful to get some help. I was trying to instantiate the lpm_divide megafunction using the following code: ENTITY dummy IS PORT...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

sorry for my earlier post. Your code was ok with connections but the names misled me.

Anyway, it seems that skip_bits in your case should be set to 1 maximum and then quartus accepts it. My experience with lpm divider is fresh and I think they mean that 7 bits(0~127)/3 bits(0~7) can have quotients from 127(127/1) ~ 18(127/7). If we ignore 1 then max quotient is 127/2 and needs 6 bits hence 1 bit can be skipped. but sounds silly if only one bit is allowed skip as div/2 means one bit less always.