SYNCHRONIZED RS232 DATA CORRUPTED

Hi there!!.

Set up attached project, capturing rs232 1200baud data and latch each byte to leds.

Project compiles and pass timing constraints wo issue. Simulation testbench also gives correct result. However when connected to max3232 board and send characters by teraterm, specially close followed... data seems corrupted. I use to send a line of 000000 on a file or several 0 by pressing rapidly, that reproduces iisue easier.

Whole design is using 50MHz clock and a clock enable signal which triggers each 1200Hz hz and drives the FSM, the capturer and the synchronizer. (Clock enable usage is suggested to use just one clock domain). system.v connects all submodules.

In design ive routed rx_in_sync output to external pin to check the rs232 data being pass to 2 flops synchronizers synced with clock enable signal.

Ive check that from time to time rx_in_sync edges are missalingned with the rs232 data from max3232 board. If that output is bad, then FSM and counter will get also corrupted data and of course leds sometime will show wrong characters... So issue is already present between clock enable generator and the actual synchronizer as below:

Clock enable signal is sent to 2 flop synchronizer-->clock enable_sync

clock enable_sync is sent to 2 flop synchronizers with clock enable input, this 2 flop sync receives the rs232 RX_IN from outside to give-->rx_in_sync as output.

In yellow is the original 1200baud rs232 byte "30" thats ascii "0".

In blue is the "rx_in_sync output" which sometimes has edges missaligned as u can see below. My scope clearly cannot decode when issue happens:

ok case

bad case, wrong edges

Anyone has come across this situation when synchronize async input data?

Thanks in advance!

BR