Stratix IV Device IO standard

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We are using Startix IV, in DE4 FPGA board. Currently the STRATIX_DEVICE_IO_STANDARD is set as 2.5V. I want to know whether 3.3V is supported?

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You need to review the schematic for the board. This setting is the default voltage for pins that you do not specify, however, that is not really sufficient since the PCB defines the I/O voltages.

I've uploaded my constraints.tcl file (renamed to constraints_tcl.txt since the Altera uploader does not accept the tcl extension).

From this constraints file, you should be able to understand what the voltages allowed on each pin are.

Cheers,

Dave

Thanks. This is what I was looking for.

Regards,

Suby

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On a different note, I need a clarification on the internal pull-up in FPGA. For the internal pull-up, am I correct to say that either we can enable it always or disable it always BUT the enable/disable is not programmable by register control internally in design?

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That is correct; the enabling/disabling of the pull-up is a configuration-time setting.

If you need run-time reconfiguration, there was a project called MorphI/O on the Altera site that reconfigured some of the I/O element features during run-time. I don't know if that included the pull-up. I'll leave that for you to review.

Cheers,

Dave