Stratix IV Device IO standard

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On a different note, I need a clarification on the internal pull-up in FPGA. For the internal pull-up, am I correct to say that either we can enable it always or disable it always BUT the enable/disable is not programmable by register control internally in design?

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That is correct; the enabling/disabling of the pull-up is a configuration-time setting.

If you need run-time reconfiguration, there was a project called MorphI/O on the Altera site that reconfigured some of the I/O element features during run-time. I don't know if that included the pull-up. I'll leave that for you to review.

Cheers,

Dave