Forum Discussion
FvM
Super Contributor
1 month agoHi,
your code doesn't show how FSM condition variables, e.g. 4W_32header_cmd_sclk_cnt are set. The reported problem suggests that condition variables are read inconsistently in FSM clock domain. Is the design fully constrained, does it pass timing analysis?
There are no indications that the problem is primarily related to FSM encoding, however if timing requirements aren't met, different encoding can create different behaviour.
Your code has invalid variable and parameter identifiers (starting with a digit), not sure how it's generated.
Regards
Frank