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Spurthy's avatar
Spurthy
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2 years ago

State Machine File Output display

Hi, Some contexts for this question: I am trying to automate the drawing and creation of HDL code for FSM to reduce the repetitive tasks. I am trying to draw an FSM using state machine file from Qu...
Hdl
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

As you mentioned, the output display is not shown in the FSM diagram. This is due to tool limitations, and unfortunately, we have stopped developing new features for Quartus Standard/Lite.


Regarding how to quickly generate HDL code:

A quicker approach is to keep the .smf file or the generated HDL code, and reuse or modify it based on the design requirements.

This way, you won't have to start from scratch.


If there is still too many repetitive tasks, perhaps tools with AI capabilities could be another approach for you?

I don't have the answer, so you may need to look for it if you find it necessary.


Regards,

Richard Tan