Forum Discussion
Altera_Forum
Honored Contributor
8 years agoInstead of gcc 4.7.4, I used the latest gcc on my distribution, which enabled me to see the real error message. Apparently you need a Questa Verification IP (VIP) license to simulate bus functional model (BFM) components. This means that you cannot simulate a Qsys generated HPS project using the Modelsim version which is integrated in the Quartus Lite package. Further support from Intel also revealed that the simulation model generated by the Qsys is only a simplified bus model, which does not accurately model the HPS along with the peripherals that you have created, but only some dummy transactions to model the HPS-FPGA bridge.