Forum Discussion
GuaBin_N_Intel
Contributor
7 years agoI've done a quick test on mentioned three IPs, ie LPDDR2, DDR3 & PLL VHDL generation in Linux based machine in version 16.0 .0 & 18.0.0 . Although megawizard took some time to generate, it still works as expected and there is no issue found including example design generation and Verilog-based module. You may post a complete IP generation messages here and possibly find some clue where it failed at.