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MaxMcCune's avatar
MaxMcCune
Icon for New Contributor rankNew Contributor
2 years ago
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Simulating FiFo IP using Quartus Pro 23.3

Hello, I am attempting to simulate the Fifo IP using the Questa Starter Edition. I am targeting the Stratix 10 GX. It is imperative that I use Quartus Pro and Questa SE to perform these simulation...
Simulation
  • RichardT_altera's avatar
    RichardT_altera
    2 years ago

    I attached an example simulation with the DCFIFO IP. This is run with different testbench and with the IP standalone only (without the fifo_top.v).

    I also add usedw signal in it.
    You may refer this as a guidelines.

    Best Regards,

    Richard Tan

RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

The next step in the simulation flow, after you have generated the simulation setup script in Quartus, is to write a simulation script.

This is a user guide for the standard simulation flow (without the Qsys). Kindly refer to section [1.5] on how to create the simulation script and then to section [1.6] 'Compile and Simulate the Design' at the following link:

Link: https://www.intel.com/content/www/us/en/docs/programmable/691278/21-3/create-the-simulation-script.html

I have also attached a simple zip file (altera_avalon_bfm_master.zip) for a BFM simulation, but this does not include the FIFO IP. It's just to give you a hands-on understanding of how things work.

At some points, you can check out this example design with FIFO IP and FIFO2 (this design does not use the qsys system). Link: https://www.intel.com/content/www/us/en/design-example/714682/intel-stratix-10-fpga-fifo-vs-fifo2-simulation-design-example.html

Best Regards,

Richard Tan