eman_delete
New Contributor
2 years agosimulating a desing with DDR3
Hello,
I have the Quartus+Qsys design which can be simulated with vcs. This design does have a DDR3 controller in the NIOS block. The design has been never simulated with the DDR3 simulation model.
How do I add the model to the design? Since the DDR3 model is a slave and it's not a part of my FPGA, I don't really care of the type of the DDR3. I just want to see some transactions on the NIOS bus after the init state. What is the simplest way to achieve that? Should I connect the DDR3 model to my DDR3 controller, or should it be done on in the top level? Where can I download a DDR3 simulation model? Are there any examples/documenttion on how to connect and simulate designs with DDR3 models?
Thank you.