Signal Tap II - Invalid JTAG Configuration (using USB Blaster) (Cyclone IV)

I actually have a similar issue, but for a Stratix V. I Synthesize my design, then I go and add SignalTap (verified it is added by seeing it checked in the SignalTap Settings page). I then compile my design. The design has no timing violations. What I notice is that sometimes everything is fine and SignalTap loads and I can connect to my design. Other times after programming I see "Invalid JTAG Configuration" Then I have to go back and remove SignalTap, re-compile and add it back again. Does anyone else know if this is typical? It is almost like something is corrupt during the build process, or the board doesn't fully get programmed.