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MinzhiWang's avatar
MinzhiWang
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Several problems encountered when we used LVDS interface on Cyclone 10 GX devices

Hello guys, I have posted one question about LVDS in Programmable Devices group. Here is the link: https://community.intel.com/t5/Programmable-Devices/Why-do-i-get-this-error-when-I-use-lvds/m-p/1619...
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AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Okay, this sounds more like an RTL level issue rather than anything with the bitslip and LVDS IP. Maybe check the RTL viewer to see if synthesis is fanning out the bitslip_pulse signal to each bit of the bitslip control in the LVDS SERDES IP.