Forum Discussion
SteveMellor
New Contributor
2 years agoSelect the PLL reference clock used for timing analysis
When a PLL has multiple reference clock inputs how can you define the one to use for timing analysis? The tool is selecting the first reference clock (pll_refclk0) for timing analysis but this is th...
- 2 years ago
Here is the user guide in case you cannot follow: https://www.intel.com/content/www/us/en/docs/programmable/683068/18-1/derive-pll-clocks-derive-pll-clocks.html
KennyT_altera
Super Contributor
2 years agoWe (Intel) have “signed-off ” from the post as we receive confirmation that we have answer your question. You can “Bring It Back To Our Attention” by logging in here ‘https://supporttickets.intel.com’ and reply within the next 15 days for further support.