Forum Discussion
SteveMellor
New Contributor
New ContributorSelect the PLL reference clock used for timing analysis
When a PLL has multiple reference clock inputs how can you define the one to use for timing analysis? The tool is selecting the first reference clock (pll_refclk0) for timing analysis but this is th...
Here is the user guide in case you cannot follow: https://www.intel.com/content/www/us/en/docs/programmable/683068/18-1/derive-pll-clocks-derive-pll-clocks.html
sstrell
Super Contributor
Super ContributorDepending on your device, you should always just use derive_pll_clocks in your .sdc and the generated clocks created by that command. Newer devices support this without you adding it explicitly to the .sdc file.
